Faster access cost-efficient design of RAM cell using multilayer crossover in QCA
Department of Electronics and Communication Engineering, ABES Institute of Technology, 201009, Ghaziabad, UP, India
2 Department of Electronics and Communication Engineering, SRM Institute of Science and Technology, NCR Campus, 201204, Ghaziabad, UP, India
3 School of Computer Science Engineering and Technology, Bennett University, 201310, Greater Noida, UP, India
Accepted: 12 February 2023
Published online: 2 March 2023
An extensive evolution can be recognized in the area of designing combinational and sequential logic circuits in quantum dot cellular automata (QCA) to produce low power high speed futuristic digital systems at nanoscale. A multilayer crossover-based cost optimized low power architecture of single-bit RAM cell is presented in this paper for the development of fast memories. The cell has all the operational facilities at lower area, cells, delay and cost function when compared to the recently reported designs in QCA. The design procedure includes the development of an improved design of multiplexer that have scalable properties at lower overheads. The implementation has been done using QCA designer 2.1.0 and QCA designer-E to obtain performance parameters and power dissipation. Probability transfer matrix (PTM) framework for the proposed design is also provided with the help of Kronecker products and matrix–matrix products. The calculation is done using MATLAB to find the probability of failure for required output at different values of error rate.
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